PCB Prototype the Easy Way

Full feature custom PCB prototype service.

Help Center
Sending a message
9:00 - 23:00, Mon.- Sun. (GMT+8)
Service hotlines
+86 571 8531 7532

9:00 - 18:00, Mon.- Fri. (GMT+8)

9:00 - 12:00, Sat. (GMT+8)

(Except Chinese public holidays)

Stackup for 4,6,8 layers Multi-layer laminated structure

4+6+4 HDI stackup Layer buildup/stackup reference

4+6+4 HDI PCB stackup

The following is the usual stackup information(4,6,8 layer PCB standard stackup), which also can be used as stackup of impedances.
In other special cases or Advanced PCBs (you need to choose " Additional Options" and custom stackup or control impedance):
1. If you need custom stackup or control impedance, we will manufacture according to your requirement.
2. After place order,we will calculate whether it meets the requirements based on the stackup , material and impedance information.Also we will confirm with you.
Stack-up for FPC>>

Last updated: December 2021

4-layer PCB standard stackup

  • 0.4mm
  • 0.6mm
  • 0.8mm
  • 1mm
  • 1.2mm
  • 1.6mm
  • 2mm
  • 2.4mm
Thickness Copper thick (outer/inner) Layer No. StackUp Laminated chart Thickness
1.6mm±10% 1/1oz L1   Copper 18 um--plating to 35um
     
    PP 0.11 mm(2116) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L2    
    Core 1.2mm with 1/1 oz Cu
L3    
     
    PP 0.11 mm(2116) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L4   Copper 18 um--plating to 35um
1.6mm±10% 2/1oz L1   Copper 50um(±5)um-plating to 70um
     
    PP 0.11 mm(2116) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L2    
    Core 1.2mm with 1/1 oz Cu
L3    
     
    PP 0.11 mm(2116) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L4   Copper 50um(±5)um-plating to 70um
1.6mm±10% 2/1.5oz L1   Copper 50um(±5)um-plating to 70um
     
    PP 0.22 mm dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L2    
    Core 1mm with 1.5/1.5 oz Cu
L3    
     
    PP 0.22 mm dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L4   Copper 50um(±5)um-plating to 70um

6-layer PCB standard stackup

  • 0.8mm
  • 1mm
  • 1.2mm
  • 1.6mm
  • 2mm
  • 2.4mm
Thickness Copper thick (outer/inner) Layer No. StackUp Laminated chart Thickness
1.6mm±10% 1/1oz L1   Copper 18 um--plating to 35um
     
    PP 0.11 mm(2116) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L2    
    Core 0.6mm with 1/1 oz Cu
L3    
     
    PP 0.11 mm(2116) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L4    
    Core 0.6mm with 1/1 oz Cu
L5    
     
    PP 0.11 mm(2116) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L6   Copper 18 um--plating to 35um
1.6mm±10% 2/1oz L1   Copper 50um(±5)um-plating to 70um
     
    PP 0.18 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L2    
    Core 0.4mm with 1/1 oz Cu
L3    
     
    PP 0.18 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L4    
    Core 0.4mm with 1/1 oz Cu
L5    
     
    PP 0.18 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L6   Copper 50um(±5)um-plating to 70um
1.6mm±10% 2/1.5oz L1   Copper 50um(±5)um-plating to 70um
     
    PP 0.22 mm dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L2    
    Core 0.4mm with 1.5/1.5 oz Cu
L3    
     
    PP 0.22 mm dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L4    
    Core 0.4mm with 1.5/1.5 oz Cu
L5    
     
    PP 0.22 mm dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L6   Copper 50um(±5)um-plating to 70um

8-layer PCB standard stackup

  • 1mm
  • 1.2mm
  • 1.6mm
  • 2mm
  • 2.4mm
Thickness Copper thick (outer/inner) Layer No. StackUp Laminated chart Thickness
1.6mm±10% 1/1oz L1   Copper 18 um--plating to 35um
     
    PP 0.18 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L2    
    Core 0.3mm with 1/1 oz Cu
L3    
     
    PP 0.18 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L4    
    Core 0.3mm with 1/1 oz Cu
L5    
     
    PP 0.18 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L6    
    Core 0.3mm with 1/1 oz Cu
L7    
     
    PP 0.18 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L8   Copper 18 um--plating to 35um
1.6mm±10% 2/1oz L1   Copper 50um(±5)um-plating to 70um
     
    PP 0.18 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L2    
    Core 0.2mm with 1/1 oz Cu
L3    
     
    PP 0.18 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L4    
    Core 0.2mm with 1/1 oz Cu
L5    
     
    PP 0.18 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L6    
    Core 0.2mm with 1/1 oz Cu
L7    
     
    PP 0.18 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L8   Copper 50um(±5)um-plating to 70um
1.6mm±10% 2/1.5oz L1   Copper 50um(±5)um-plating to 70um
     
    PP 0.22 mm dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L2    
    Core 0.2mm with 1.5/1.5 oz Cu
L3    
     
    PP 0.22 mm dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L4    
    Core 0.2mm with 1.5/1.5 oz Cu
L5    
     
    PP 0.22 mm dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L6    
    Core 0.2mm with 1.5/1.5 oz Cu
L7    
     
    PP 0.22 mm dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L8   Copper 50um(±5)um-plating to 70um

10-layer PCB standard stackup

  • 1.6mm
  • 2mm
  • 2.4mm
Thickness Copper thick (outer/inner) Layer No. StackUp Laminated chart Thickness
1.6mm±10% 1/1oz L1   Copper 18 um--plating to 35um
     
    PP 0.12 mm(2116) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L2    
    Core 0.2mm with 1/1 oz Cu
L3    
     
    PP 0.19 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L4    
    Core 0.2mm with 1/1 oz Cu
L5    
     
    PP 0.19 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L6    
    Core 0.2mm with 1/1 oz Cu
L7    
     
    PP 0.19 mm(7628) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L8    
    Core 0.2mm with 1/1 oz Cu
L9    
     
    PP 0.12 mm(2116) dielectric constant 4.29 ± (The DK value is not absolute and will vary depending on the base material's models and thickness.)
     
L10   Copper 18 um--plating to 35um

Contact Us!

Our customer service
ready for your PCB

+86-571-85317532

quotesI am impressed with the quality of the boards, the delivery time and responce to all my questions. Best price excellent service and speedy delivery. When I need another board I will certainly use this supplier. "

-Bill Robinson Company

quotesспасибо за платы! платы очень хорошего качества. надежный продавец. оперативно отвечал на вопросы. заказ выполнили и отправили очень быстро.Заказываю платы не в первый раз - как всегда только лучшие впечатления. 5+++. 4 числа отправил файлы 26-го забрал на почте в Москве."

-FVL. SKU Company
Front-end data preparation

01.PPE - Pre Production Engineering

Customer supplied data (gerber) is used to produce the manufacturing data for the specific PCB (artworks for imaging processes and drill data for drilling programs). Engineers compare demands/specifications against capabilities to ensure compliance and also determine the process steps and associated checks. No changes are allowed without PCBWay Group permission.

Preparing

02.Board Cutting (Copper Clad Laminate Cutting)

PCB production starts with a large piece of sheet material. Due to the limitations of PCB production equipment and manufacture capabilities, the factory has requirements for its minimum and maximum processing size. Therefore, under the guidance of manufacture instruction (MI), the raw material of PCB (Copper Clad Laminate ) needs to be cut into the processing size by automatic cutting machine before production.

print icon

03.Print inner layers

Stage 1 is to transfer the image using an artwork film to the board surface, using photosensitive dry-film and UV light, which will polymerise the dry film exposed by the artwork. This step of the process is performed in a clean room.<br> Imaging – The process of transferring electronic data to the photo-plotter, which in turn uses light to transfer a negative image circuitry pattern onto the panel or film.

etch icon

04.Etch inner layers

Stage 2 is to remove the unwanted copper from the panel using etching. Once this copper has been removed, the remaining dry film is then removed leaving behind the copper circuitry that matches the design.<br> Etching – The chemical, or chemical and electrolytic, removal of unwanted portions of conductive or resistive material.

aoi icon

05.Inner layer Automatic Optical Inspection(AOI)

Inspection of the circuitry against digital “images” to verify that the circuitry matches the design and that it is free from defects. Achieved through scanning of the board and then trained inspectors will verify any anomalies that the scanning process has highlighted. PCBWay Group allows no repair of open circuits.

Lamination icon

06.Lay-up and bond (Lamination)

The inner layers have an oxide layer applied and then “stacked” together with pre-preg providing insulation between layers and copper foil is added to the top and bottom of the stack. The lamination process consists of placing the internal layers under extreme temperature (375 degrees Fahrenheit) and pressure (275 to 400 psi) while laminating with a photosensitive dry resist. The PCB is allowed to cure at a high temperature, the pressure is slowly released and then the material is slowly cooled.

drilling icon

07.Drilling the PCB

We now have to drill the holes that will subsequently create electrical connections within the multilayer PCB. This is a mechanical drilling process that must be optimised so that we can achieve registration to all of the the inner layer connections. The panels can be stacked at this process. The drilling can also be done by a laser drill

copper icon

08.Electroless copper deposition

The first step in the plating process is the chemical deposition of a very thin layer of copper on the hole walls.
PTH provides a very thin deposit of copper that covers the hole wall and the complete panel. A complex chemical process that must be strictly controlled to allow a reliable deposit of copper to be plated even onto the non-metallic hole wall. Whilst not a sufficient amount of copper on its own, we now have electrical continuity between layers and through the holes.Panel plating follows on from PTH to provide a thicker deposit of copper on top of the PTH deposit – typically 5 to 8 um. The combination is used to optimise the amount of copper that is to be plated and etched in order to achieve the track and gap demands.

image icon

09.Image the outer layers

Similar to the inner layer process (image transfer using photosensitive dry film, exposure to UV light and etching), but with one main difference – we will remove the dry film where we want to keep the copper/define circuitry – so we can plate additional copper later in the process.
This step of the process is performed in a clean room.

Plating icon

10.Plating

Second electrolytic plating stage, where the additional plating is deposited in areas without dry film (circuitry). Once the copper has been plated, tin is applied to protect the plated copper.

etch icon

11.Etch outer layer

This is normally a three step process. The first step is to remove the blue dry film. The second step is to etch away the exposed/unwanted copper whilst the tin deposit acts an etch resist protecting the copper we need. The third and final step is to chemically remove the tin deposit leaving the circuitry.

AOI

12.Outer layer AOI

Just like with inner layer AOI the imaged and etched panel is scanned to make sure that the circuitry meets design and that it is free from defects. Again no repair of open circuits are allowed under PCBWay demands.

Soldermask

13.Soldermask

Soldermask ink is applied over the whole PCB surface. Using artworks and UV light we expose certain areas to the UV and those areas not exposed are removed during the chemical development process – typically the areas which are to be used as solderable surfaces. The remaining soldermask is then fully cured making it a resilient finish.<br> This step of the process is performed in a clean room.

Surface finish

14.Surface finish

Various finishes are then applied to the exposed copper areas. This is to enable protection of the surface and good solderability. The various finishes can include Electroless Nickel Immersion Gold, HASL, Immersion Silver etc. Thicknesses and solderability tests are always carried out.

Profile

15.Profile

This is the process of cutting the manufac-turing panels into specific sizes and shapes based upon the customer design as defined within the gerber data. There are 3 main options available when providing the array or selling panel – scoring, routing or punching. All dimensions are measured against the customer supplied drawing to ensure the panel is dimensionally correct.

Electrical test

16.Electrical test

Used for checking the integrity of the tracks and the through hole interconnections – checking to ensure there are no open circuits or no short circuits on the finished board. There are three test methods, flying probe for smaller volumes,fixture based for volumes and 4-wire Kelvin testing (For PCBs use in automotive, or aerospace applications).We electrically test every PCB against the original board data. Using a flying probe tester we check each net to ensure that it is complete (no open circuits) and does not short to any other net.

inspection

17.Final inspection

In the last step of the process a team of sharp-eyed inspectors give each PCB a final careful check-over.Visual checking the PCB against acceptance criteria and using PCBWay “approved” inspectors. Using manual visual inspection and AVI – compares PCB to gerber and has a faster checking speed that human eyes, but still requires human verification. All orders are also subjected to a full inspection including dimensional, solderability, etc.

Packaging

18.Packaging

Boards are wrapped using materials that comply with the PCBWay Packaging demands (ESD etcetera) and then boxed prior to be being shipped using the requested mode of transport.